Senior SerDes system engineer (Signal Integrity)

Position Overview:

We are seeking a Senior SerDes System Engineer specializing in signal integrity to join our team in Grenoble. This role requires deep expertise in hardware architecture design for telecommunications and communication products, with a focus on high-speed signal processing.

Key Responsibilities

• • Design and develop hardware architectures for telecom and communication products, leveraging extensive knowledge in the field.
  • Lead the development of high-speed products and prototypes, with a particular emphasis on those exceeding 56 Gbps, ensuring successful delivery of these advanced solutions.
  • Utilize advanced knowledge of high-speed SerDes architecture, including Rx/Tx SerDes PHY, equalization techniques, and challenges at the DSP level.
  • Work with critical high-speed serial hardware components such as SerDes, high-speed ASICs, packages, DSPs, PCBs, and connectors.
  • Conduct lab experiments and prototyping for high-speed serial links, utilizing real-time oscilloscopes and VNAs to correlate experimental results with simulations.
  • Stay informed about industry standards, including IEEE 802.3/OIF-CEI standards and Common Electrical I/O (CEI)-224G or InfiniBand.
  • Participate in conferences and industry events, contributing to academic discussions and advancements in technology.
  • Exhibit a strong passion for technology and a commitment to making significant contributions in the field.

Essential Skills and Experience

• • A Master’s degree or higher in Electrical Engineering, Information Technology, Communication Engineering, Electromagnetic Science, or a related field a PhD is preferred.
  • Over 8 years of relevant work experience with in-depth knowledge and extensive experience in system hardware architecture design for telecom/communication products.
  • Proven track record in the development of high-speed products/prototypes at 56 Gbps and beyond, with successful product delivery.
  • Strong understanding of high-speed SerDes architecture, including Rx/Tx PHY, equalization techniques, CDR, and related DSP challenges.
  • Familiarity with key high-speed serial hardware, such as SerDes, high-speed ASICs, packages, DSPs, PCBs, and connectors.
  • Proficient in conducting high-speed serial links lab experiments and prototyping, with skills in using tools like real-time oscilloscopes and VNAs for result correlation.
  • Knowledge of relevant industry standards, including IEEE 802.3, OIF-CEI, CEI-224G, or InfiniBand.
  • A technology enthusiast with a curious mindset and motivation to contribute significantly to the field of expertise.
  • Experience in high-speed SerDes modeling and simulation using tools such as Python (preferred), Matlab, Verilog-A, or ADS.
  • Proficiency with signal integrity tools, including HFSS and CST.

Benefits

• • The chance to work at the forefront of telecommunications technology in a dynamic and innovative environment.
  • Opportunities for professional development and participation in conferences and industry events.
  • A collaborative team atmosphere with a focus on cutting-edge research and development.
  • Competitive salary and benefits package.

If you're passionate about signal integrity and high-performance system engineering, we invite you to apply for this position. Please click 'Apply Now' to submit your CV and cover letter, outlining your experience and passion for SerDes engineering.

Commitment to Diversity and Inclusion

Our company is dedicated to promoting diversity and inclusion. We value the unique contributions that individuals from all backgrounds bring to our teams, and we encourage applications from candidates of all genders, ethnicities, and abilities.

Lugar de trabajo